Arithmetic Logic

System Control

Functions

At the heart of every computer, there is the Arithmetic Logic Unit (or ALU). But before the ALU can be designed, the functions it will perform have to be decided on. As Tiny Tim is quite a simple computer, these functions won't be very complex or numerous, but there will be enough there to allow it to be Turing complete.

On the previous page I hinted at some of the functions I plan to use, as they are written up in the instruction set. However I will be going into them in more detail on this page.

The planned functions are shown below, however these may well change depending on how hard they are to create in hardware, how flexible they are, etc.

ADD; Adds the contents of the W register and a number in memory together.

INC; Incriments the addressed location and puts the answer in the W register

AND; And's the contents of the W register and a number in memory together

NOT; Inverts the contents of the addressed location and puts the answer in the W register

Adder

Unfortunately, there is a problem with the proposed setup; having spent all this time designing synchronous counters and high speed logic, I had forgotten about the problems that ripple counters can cause in terms of speed. If I was going to have an 8 bit ripple counter, there would be a propagation delay of approximately 16 gates. Seeing as it has to have a stable answer after half a clock pulse, something has to be done to sort this. Otherwise the total speed of the computer would have to be significantly reduced for the sake of one command.

I looked at various solutions; Carry-lookahead adder (to big), Serial adder (too slow), adder in software (far too slow!)... Eventually I realised that the easiest solution would be just to leave the ripple adder more time to settle by allowing it another clock pulse. To show you what I mean I've drawn out a timing diagram:

This would be implemented by pausing the sequencer for a single clock pulse to allow the adder output to settle. It takes less gates to implement than a carry look ahead adder, and is far faster than a serial adder. It also doesn't slow the time taken for the other commands, as only the adder command will get the extra clock pulse.

NOT logic

This will be implemented by taking the inverted output of each gate in the W register and clocking it back in to itself. This saves on gates as it doesn't require any further logic to invert the signal.

Input /Output systems

Research